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ltc3586-2/ltc3586-3 1 358623f typical application features applications description high effciency usb power manager with boost, buck-boost and dual bucks the ltc ? 3586-2/ltc3586-3 are highly integrated power management and battery charger ics for li-ion/polymer battery applications. they include a high ef?ciency cur - rent limited switching powerpath manager with automatic load prioritization, battery charger, ideal diode, and four synchronous switching regulators (two bucks, one buck- boost and one boost). designed speci?cally for usb ap - plications, the ltc3586-2/ltc3586-3s switching power manager automatically limits input current to a maximum of either 100ma or 500ma for usb applications or 1a for adapter-powered applications. unlike linear chargers, the ltc3586-2/ltc3586-3 switching architecture transmits nearly all of the power available from the usb port to the load with minimal loss and heat which eases thermal constraints in small places. the two buck regulators can provide up to 400ma each, the buck-boost can deliver 1a, and the boost delivers at least 800ma. the ltc3586-2/ltc3586-3 are available in a low pro ? le (0.75mm) 38-pin 4mm 6mm qfn package. high effciency powerpath manager, dual buck, buck-boost and boost power manager n high effciency switching powerpath? controller with bat-track? adaptive output control and instant-on operation n programmable usb or wall current limit (100ma/500ma/1a) n full featured li-ion/polymer battery charger with float voltage of 4.2v (ltc3586-2) or 4.1v (ltc3586-3) with 1.5a maximum charge current n internal 180m ideal diode plus external ideal diode controller powers load in battery mode n <30a no-load quiescent current when powered from bat dc/dcs n dual high ef ? ciency buck dc/dcs (400ma i out ) n high ef ? ciency buck-boost dc/dc (1a i out ) n high ef ? ciency boost dc/dc (800ma i out ) n dc/dc fault output n compact (4mm 6mm) 38-pin qfn package n portable medical/industrial devices n other usb-based handheld products li-ion fault 0.8v to 3.6v/400ma 5v/800ma 3.3v/20ma 2.5v to 3.3v/1a 0.8v to 3.6v/400ma optional 0v t to other loads + ltc3586-2/ltc3586-3 dual high efficiency bucks high efficiency buck-boost high efficiency boost always on ldo memory/ core p rtc/low power logic i/o system 358623 ta01 usb/wall 4.5v to 5.5v charge i lim usb compliant step-down regulator cc/cv battery charger mode en 2 4 1 2 audio/ motor 4 3 current control battery voltage (v) 2.8 0 charge current (ma) 200 3.2 3.6 3.8 100 700 400 500 600 300 3 3.4 4 4.2 358623 ta01b battery charge current 500ma usb current limit extra current for faster charging v bus = 5v 5x mode battery charger programmed for 1a battery charge current vs battery voltage (ltc3586-2) l , lt, ltc, ltm, burst mode, linear technology and the linear logo are registered trademarks and powerpath and bat-track are trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents including 6522118, 6404251.
ltc3586-2/ltc3586-3 2 358623f pin configuration absolute maximum ratings v bus (transient) t < 1ms, duty cycle < 1% .......................................... C 0.3v to 7v v in1 , v in2 , v in3 , v in4 , v bus (static), bat, ntc, chrg, fault , i lim0 , i lim1 , en3, en4, mode, fb4, v out4 ..................... C 0.3v to 6v fb1 ................... C 0.3v to lesser of 6v and (v in1 + 0.3v) fb2 ................... C 0.3v to lesser of 6v and (v in2 + 0.3v) fb3, v c3 ........... C 0.3v to lesser of 6v and (v in3 + 0.3v) en1, en2 ................................ C 0.3v to lesser of 6v and max (v bus, v out, bat) + 0.3v i clprog .................................................................... 3ma i fault , i chrg ........................................................... 50ma i prog ........................................................................ 2ma i ldo3v3 ................................................................... 30ma i sw1 , i sw2 ............................................................ 600ma i sw , i bat , i vout ............................................................ 2a i swab3 , i swcd3 , i sw4 , i vout3 ................................... 2.5a operating temperature range (note 2) .... C 40c to 85c junction temperature (note 3) ............................. 125c storage temperature range ................... C 65c to 125c (notes 1, 5) 13 14 15 16 top view 39 gnd ufe package 38-lead (4mm 6mm) plastic qfn 17 18 19 38 37 36 35 34 33 32 24 25 26 27 28 29 30 31 8 7 6 5 4 3 2 1i lim0 i lim1 ldo3v3 clprog ntc v out4 v out4 sw4 mode fb4 fb3 v c3 gate chrg prog fb1 v in1 sw1 sw2 v in2 fb2 v in4 en1 en2 fault sw v bus v bus v out en4 bat swab3 v in3 v in3 v out3 v out3 en3 swcd3 23 22 21 20 9 10 11 12 t jmax = 125c, v ja = 38.7c/w exposed pad (pin 39) is gnd, must be soldered to pcb order information ltc3586 product options lead free finish tape and reel part marking package description temperature range ltc3586eufe-2#pbf ltc3586eufe-2#trpbf 35862 38-lead (4mm w 6mm) plastic qfn C 40c to 85c ltc3586eufe-3#pbf ltc3586eufe-3#trpbf 35863 38-lead (4mm w 6mm) plastic qfn C 40c to 85c consult ltc marketing for parts speci ? ed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci ? cations, go to: http://www.linear.com/tapeandreel/ options float voltage (v float ) fault pin functionality boost overvoltage threshold (v ov4 ) boost overvoltage hysteresis (?v ov4 ) ltc3586 4.2v bi-directional with latch 5.3v 300mv ltc3586-1 4.1v bi-directional with latch 5.3v 300mv ltc3586-2 4.2v output only, no latch 5.5v 100mv ltc3586-3 4.1v output only, no latch 5.5v 100mv
ltc3586-2/ltc3586-3 3 358623f electrical characteristics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. v bus = 5v, bat = 3.8v, v in1 = v in2 = v in3 = v in4 = v out3 = 3.8v, v out4 = 5v, r prog = 1k, r clprog = 3.01k, unless otherwise noted. symbol parameter conditions min typ max units powerpath switching regulator v bus input supply voltage 4.35 5.5 v i buslim total input current 1x mode, v out = bat 5x mode, v out = bat 10x mode, v out = bat suspend mode, v out = bat l l l l 87 436 800 0.31 95 460 860 0.38 100 500 1000 0.50 ma ma ma ma i vbusq v bus quiescent current 1x mode, i vout = 0ma 5x mode, i vout = 0ma 10x mode, i vout = 0ma suspend mode, i vout = 0ma 7 15 15 0.044 ma ma ma ma h clprog (note 4) ratio of measured v bus current to clprog program current 1x mode 5x mode 10x mode suspend mode 224 1133 2140 9.3 ma/ma ma/ma ma/ma ma/ma i out(powerpath) v out current available before loading bat 1x mode, bat = 3.3v 5x mode, bat = 3.3v 10x mode, bat = 3.3v suspend mode 135 672 1251 0.32 ma ma ma ma v clprog clprog servo voltage in current limit 1x, 5x, 10x modes suspend mode 1.188 100 v mv v uvlo_vbus v bus undervoltage lockout rising threshold falling threshold 3.95 4.30 4.00 4.35 v v v uvlo_vbus-bat v bus to bat differential undervoltage lockout rising threshold falling threshold 200 50 mv mv v out v out voltage 1x, 5x, 10x modes, 0v < bat < 4.2v, i vout = 0ma, battery charger off 3.5 bat + 0.3 4.7 v usb suspend mode, i vout = 250a 4.5 4.6 4.7 v f osc switching frequency 1.8 2.25 2.7 mhz r pmos_powerpath pmos on-resistance 0.18 r nmos_powerpath nmos on-resistance 0.30 i peak_powerpath peak switch current limit (note 5) 1x, 5x modes 10x mode 2 3 a a battery charger v float bat regulated output voltage ltc3586-2 ltc3586-2 ltc3586-3 ltc3586-3 l l 4.179 4.165 4.079 4.065 4.200 4.200 4.100 4.100 4.221 4.235 4.121 4.135 v v v v i chg constant-current mode charge current r prog = 1k r prog = 5k 980 185 1022 204 1065 223 ma ma i bat battery drain current v bus > v uvlo , i vout = 0a v bus = 0v, i vout = 0a (ideal diode mode) 2 3.5 29 5 41 a a v prog prog pin servo voltage 1.000 v v prog_trkl prog pin servo voltage in trickle charge bat < v trkl 0.100 v v c/10 c/10 threshold voltage at prog 100 mv h prog ratio of i bat to prog pin current 1022 ma/ma i trkl trickle charge current bat < v trkl 100 ma
ltc3586-2/ltc3586-3 4 358623f electrical characteristics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. v bus = 5v, bat = 3.8v, v in1 = v in2 = v in3 = v in4 = v out3 = 3.8v, v out4 = 5v, r prog = 1k, r clprog = 3.01k, unless otherwise noted. symbol parameter conditions min typ max units v trkl trickle charge threshold voltage bat rising 2.7 2.85 3.0 v ?v trkl trickle charge hysteresis voltage 130 mv v rechrg recharge battery threshold voltage threshold voltage relative to v float C75 C100 C125 mv t term safety timer termination timer starts when bat = v float 3.3 4 5 hour t badbat bad battery termination time bat < v trkl 0.42 0.5 0.63 hour h c/10 end-of-charge indication current ratio (note 6) 0.088 0.1 0.112 ma/ma v chrg chrg pin output low voltage i chrg = 5ma 65 100 mv i chrg chrg pin leakage current v chrg = 5v 1 a r on_chg battery charger power fet on-resistance (between v out and bat) 0.18 t lim junction temperature in constant temperature mode 110 c ntc v cold cold temperature fault threshold voltage rising threshold hysteresis 75.0 76.5 1.5 78.0 %v bus %v bus v hot hot temperature fault threshold voltage falling threshold hysteresis 33.4 34.9 1.73 36.4 %v bus %v bus v dis ntc disable threshold voltage falling threshold hysteresis 0.7 1.7 50 2.7 %v bus mv i ntc ntc leakage current v ntc = v bus = 5v C50 50 na ideal diode v fwd forward voltage v bus = 0v, i vout = 10ma i vout = 10ma 2 15 mv mv r dropout internal diode on-resistance, dropout v bus = 0v 0.18 i max_diode internal diode current limit 1.6 a always on 3.3v supply v ldo3v3 regulated output voltage 0ma < i ldo3v3 < 20ma 3.1 3.3 3.5 v r cl_ldo3v3 closed-loop output resistance 4 r ol_ldo3v3 dropout output resistance 23 logic input (en1, en2, en3, en4, mode, ilim0, ilim1) v il logic low input voltage 0.4 v v ih logic high input voltage 1.2 v i pd pull-down current 1 a fault output v fault fault pin output low voltage i fault = 5ma 65 100 mv fault delay 14 ms fbx voltage threshold for fault (x = 1, 2, 3, 4) 0.736 v
ltc3586-2/ltc3586-3 5 358623f electrical characteristics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. v bus = 5v, bat = 3.8v, v in1 = v in2 = v in3 = v in4 = v out3 = 3.8v, v out4 = 5v, r prog = 1k, r clprog = 3.01k, unless otherwise noted. symbol parameter conditions min typ max units switching regulators 1, 2, 3 and 4 v in1, 2, 3, 4 input supply voltage 2.7 5.5 v v outuvlo v out uvlov out falling v out uvlov out rising v in1, 2, 3, 4 connected to v out through low impedance. switching regulators are disabled in uvlo 2.5 2.6 2.8 2.9 v v f osc oscillator frequency 1.8 2.25 2.7 mhz i fb1, 2, 3, 4 fbx input current v fb1, 2, 3, 4 = 0.85v C50 50 na v fb1, 2, 3, 4 v fbx servo voltage l 0.78 0.80 0.82 v switching regulators 1 and 2 (buck) i vin1,2 pulse-skipping mode input current burst mode ? input current shutdown input current i vout1,2 = 0a, (note 7) i vout1,2 = 0a, (note 7) i vout1,2 = 0a, (note 7) 225 35 60 1 a a a i lim1,2 pmos switch current limit pulse-skipping/burst mode operation (note 5) 600 800 1100 ma r p1,2 pmos r ds(on) 0.6 r n1,2 nmos r ds(on) 0.7 d 1,2 maximum duty cycle 100 % r sw1,2 sw1,2 pull-down in shutdown 10 k switching regulator 3 (buck-boost) i vin3 input current pwm mode, i vout3 = 0a burst mode operation, i vout3 = 0a shutdown 220 13 0 400 20 1 a a a v out3(low) minimum regulated output voltage for burst mode operation or pwm mode 2.65 2.75 v v out3(high) maximum regulated output voltage 5.5 5.6 v i limf3 forward current limit (switch a) pwm mode (note 5) l 2 2.5 3 a i peak3(burst) forward burst current limit (switch a) burst mode operation l 200 275 350 ma i zero3(burst) reverse burst current limit (switch d) burst mode operation l C30 0 30 ma i max3(burst) maximum deliverable output current in burst mode operation 2.7v v in3 5.5v, 2.75v v out3 5.5v (note 8) 50 ma r ds(on)p pmos r ds(on) switches a, d 0.22 r ds(on)n nmos r ds(on) switches b, c 0.17 i leak(p) pmos switch leakage switches a, d C1 1 a i leak(n) nmos switch leakage switches b, c C1 1 a r vout3 v out3 pull-down in shutdown 10 k d buck(max) maximum buck duty cycle pwm mode l 100 % d boost(max) maximum boost duty cycle pwm mode 75 % t ss3 soft-start time 0.5 ms
ltc3586-2/ltc3586-3 6 358623f electrical characteristics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. v bus = 5v, bat = 3.8v, v in1 = v in2 = v in3 = v in4 = v out3 = 3.8v, v out4 = 5v, r prog = 1k, r clprog = 3.01k, unless otherwise noted. symbol parameter conditions min typ max units switching regulator 4 (boost) i vin4 input current fb4 > 0.8v, i vout4 = 0a shutdown, v out4 = 0v 180 1 a a i vout4 q-current drawn from boost output fb4 = 0v 7.5 ma i limf4 nmos switch current limit (note 5) 2000 2800 ma v out4 output voltage adjust range 5 v v ov4 overvoltage shutdown 5.3 5.5 5.7 v ?v ov4 overvoltage shutdown hysteresis 0.1 v r ds(on)p4 pmos r ds(on) synchronous switch 0.25 r ds(on)n4 nmos r ds(on) main switch 0.17 i leak(p)4 pmos switch leakage synchronous switch C1 1 a i leak(n)4 nmos switch leakage main switch C1 1 a r vout4 v out4 pull-down in shutdown 10 k d boost(max) maximum boost duty cycle 91 94 % t ss4 soft-start time 0.375 ms note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3586e-2/ltc3586e-3 are guaranteed to meet performance speci?cations from 0c to 85c. speci?cations over the C 40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: the ltc3586e-2/ltc3586e-3 include overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci?ed maximum operating junction temperature may impair device reliability. note 4: total input current is the sum of quiescent current, i vbusq , and measured current given by: v clprog /r clprog ? (h clprog +1) note 5: the current limit features of this part are intended to protect the ic from short term or intermittent fault conditions. continuous operation above the maximum speci ? ed pin current rating may result in device degradation or failure. note 6: h c/10 is expressed as a fraction of measured full charge current with indicated prog resistor. note 7: fbx above regulation such that regulator is in sleep. speci ? cation does not include resistive divider current refected back to v inx . note 8: guaranteed by design.
ltc3586-2/ltc3586-3 7 358623f typical performance characteristics ideal diode v-i characteristics ideal diode resistance vs battery voltage output voltage vs output current (battery charger disabled) usb limited battery charge current vs battery voltage usb limited battery charge current vs battery voltage battery drain current vs battery voltage powerpath switching regulator effciency vs output current battery charging effciency vs battery voltage with no external load (p b at /p bus ) battery voltage (v) 2.7 500 600 700 3.9 358623 g04 400 300 3.0 3.3 3.6 4.2 200 100 0 charge current (ma) v bus = 5v r prog = 1k r clprog = 3k 5x usb setting, battery charger set for 1a ltc3586-3 ltc3586-2 battery voltage (v) 2.7 0 charge current (ma) 25 50 75 100 125 150 3.0 3.3 3.6 3.9 358623 g05 4.2 v bus = 5v r prog = 1k r clprog = 3k 1x usb setting, battery charger set for 1a ltc3586-3 ltc3586-2 battery voltage (v) 2.7 battery drain current (a) 15 20 25 3.9 358623 g06 10 5 0 3.0 3.3 3.6 4.2 v bus = 0v v bus = 5v (suspend mode, r clprog = 3.01k) i vout = 0a output current (a) 0.01 40 efficiency (%) 50 60 70 80 100 0.1 1 358623 g07 90 5x, 10x mode 1x mode bat = 3.8v forward voltage (v) 0 current (a) 0.6 0.8 1.0 0.16 358623 g01 0.4 0.2 0 0.04 0.08 0.12 0.20 internal ideal diode with supplemental external vishay si2333 pmos internal ideal diode only v bus = 0v v bus = 5v battery voltage (v) 2.7 resistance () 0.15 0.20 0.25 3.9 358623 g02 0.10 0.05 0 3.0 3.3 3.6 4.2 internal ideal diode with supplemental external vishay si2333 pmos internal ideal diode output current (ma) 0 output voltage (v) 4.00 4.25 4.50 800 358623 g03 3.75 3.50 3.25 200 400 600 1000 bat = 4v bat = 3.4v v bus = 5v 5x mode battery voltage (v) 2.7 efficiency (%) 80 90 3.9 358623 g08 70 60 3 3.3 3.5 4.2 100 r clprog = 3.01k r prog = 1k i vout = 0ma 5x charging efficiency 1x charging efficiency (t a = 25c unless otherwise noted)
ltc3586-2/ltc3586-3 8 358623f typical performance characteristics battery charge current vs temperature battery charger float voltage vs temperature low battery (instant on) output voltage vs temperature oscillator frequency vs temperature temperature (c) ?40 0 charge current (ma) 100 200 300 400 0 40 80 120 358623 g13 500 600 ?20 20 60 100 thermal regulation r prog = 2k 10x mode temperature (c) ?40 float voltage (v) 4.19 4.20 60 358623 g14 4.18 4.17 ?15 10 35 85 4.21 temperature (c) ?40 output voltage (v) 3.64 3.66 60 358623 g15 3.62 3.60 ?15 10 35 85 3.68 bat = 2.7v i vout = 100ma 5x mode temperature (c) ?40 frequency (mhz) 2.2 2.4 60 358623 g16 2.0 1.8 ?15 10 35 85 2.6 v bus = 5v bat = 3.6v v bus = 0v bat = 3v v bus = 0v bat = 2.7v v bus = 0v (t a = 25c unless otherwise noted) output voltage vs output current in suspend v bus current vs output current in suspend 3.3v ldo output voltage vs output current, v bus = 0v output current (ma) 0 output voltage (v) 4.0 4.5 5.0 0.4 358623 g10 3.5 3.0 2.5 0.1 0.2 0.3 0.5 v bus = 5v bat = 3.3v r clprog = 3.01k output current (ma) 0 v bus current (ma) 0.3 0.4 0.5 0.4 358623 g11 0.2 0.1 0 0.1 0.2 0.3 0.5 v bus = 5v bat = 3.3v r clprog = 3.01k output current (ma) 0 output voltage (v) 3.0 3.2 20 358623 g12 2.8 2.6 5 10 15 25 3.4 bat = 3v bat = 3.1v bat = 3.2v bat = 3.3v bat = 3.6v bat = 3.5v bat = 3.4v bat = 3.9v, 4.2v v bus current vs v bus voltage (suspend) v bus voltage (v) 0 v bus quiescent current (a) 30 35 40 45 4 358623 g09 25 20 15 10 5 0 1 2 3 5
ltc3586-2/ltc3586-3 9 358623f v bus quiescent current vs temperature v bus quiescent current in suspend vs temperature temperature (c) ?40 v bus quiescent current (ma) 9 12 60 358623 g17 6 3 ?15 10 35 85 15 v bus = 5v i vout = 0a 5x mode 1x mode temperature (c) ?40 v bus quiescent current (a) 50 60 60 358623 g18 40 30 ?15 10 35 85 70 i vout = 0a typical performance characteristics chrg pin current vs voltage (pull-down state) 3.3v ldo step response (5ma to 15ma) battery drain current vs temperature switching regulators 1, 2 pulse- skipping mode quiescent currents chrg pin voltage (v) 0 chrg pin current (ma) 60 80 100 4 358623 g19 40 20 0 1 2 3 5 v bus = 5v bat = 3.8v i ldo3v3 5ma/div 0ma 20s/div bat = 3.8v 358623 g20 v ldo3v3 20mv/div ac- coupled temperature (c) ?40 battery drain current (a) 30 40 50 60 358623 g21 20 10 0 ?15 10 35 85 bat = 3.8v v bus = 0v all regulators off temperature (c) ? 40 quiescent current (a) input current (ma) 275 300 325 60 358623 g22 250 225 200 1.85 1.90 1.95 1.80 1.75 1.70 ?15 10 35 85 v out1, 2 = 2.5v (constant frequency) v out1, 2 = 1.25v (pulse skipping) v in1, 2 = 3.8v switching regulators 1, 2 pulse-skipping mode effciency output current (ma) 1 40 efficiency (%) 50 60 70 80 10 100 1000 358623 g23 30 20 10 0 90 100 v out1, 2 = 2.5v v out1, 2 = 1.2v v out1, 2 = 1.8v v in1, 2 = 3.8v (t a = 25c unless otherwise noted) switching regulators 1, 2 burst mode effciency output current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 358623 g24 0 1 v out1, 2 = 2.5v v out1, 2 = 1.2v v out1, 2 = 1.8v v in1, 2 = 3.8v
ltc3586-2/ltc3586-3 10 358623f temperature (c) ?55 11.0 i q (a) 11.5 12.5 13.0 13.5 ?15 25 45 125 358623 g31 12.0 ?35 5 65 85 105 14.0 v in1 = 3v v in3 = 4.5v v in3 = 3.6v v in3 (v) 2.7 0 reduction below 1a (ma) 50 100 150 200 250 300 3.1 3.5 3.9 4.3 358623 g32 4.7 steady-state i load start-up with a resistive load start-up with a current source load v out3 = 3.3v type 3 compensation typical performance characteristics buck-boost regulator burst mode operation quiescent current reduction in current deliverability at low v in3 (t a = 25c unless otherwise noted.) i load (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 358623 g28 0 1 v out3 = 3.3v type 3 compensation burst mode operation curves pwm mode curves v in3 = 3v v in3 = 3.6v v in3 = 4.5v v in3 = 3v v in3 = 3.6v v in3 = 4.5v temperature (c) ?55 0 pmos r ds(on) () nmos r ds(on) () 0.05 0.15 0.20 0.25 ?15 25 45 125 358623 g29 0.10 ?35 5 65 85 105 0.30 0.10 0.15 0.25 0.30 0.35 0.20 0.40 pmos v in3 = 3v pmos v in3 = 3.6v pmos v in3 = 4.5v nmos v in3 = 3v nmos v in3 = 3.6v nmos v in3 = 4.5v temperature (c) ?55 2300 i limf (ma) 2350 2450 2500 2550 ?15 25 45 125 358623 g30 2400 ?35 5 65 85 105 2600 v in3 = 3v v in3 = 3.6v v in3 = 4.5v buck-boost regulator forward current limit buck-boost regulator effciency vs i load r ds(on) for buck-boost regulator switching regulators 1, 2 load regulation at v out1, 2 = 2.5v output current (ma) 2.47 output voltage (v) 2.50 2.53 2.56 0.1 10 100 1000 358623 g27 2.44 1 v bus = 3.8v burst mode operation pulse-skipping mode switching regulators 1, 2 load regulation at v out1, 2 = 1.2v switching regulators 1, 2 load regulation at v out1, 2 = 1.8v output current (ma) 1.185 output voltage (v) 1.200 1.215 1.230 0.1 10 100 1000 358623 g25 1.170 1 v bus = 3.8v burst mode operation pulse-skipping mode output current (ma) 1.778 output voltage (v) 1.800 1.823 1.845 0.1 10 100 1000 358623 g26 1.755 1 v bus = 3.8v burst mode operation pulse-skipping mode
ltc3586-2/ltc3586-3 11 358623f typical performance characteristics buck-boost step response boost effciency (v in4 = 3.8v) boost effciency vs v in4 boost output voltage vs temperature input voltage v in4 (v) 2.6 0 efficiency (%) 90 80 70 60 50 40 30 20 10 100 3 5 5.4 3.4 3.8 4.2 358623 g35 4.6 i vout4 = 300ma v out4 = 5v synch pmos off temperature (c) ?45 4.950 4.985 4.980 4.975 4.970 4.965 4.960 4.955 4.995 4.990 5.000 ?30 ?15 0 3015 358623 g36 45 60 75 90 v out4 (v) v in4 = 2.7v v in4 = 3.8v v in4 = 4.5v maximum deliverable boost output current maximum boost duty cycle vs v in4 boost step response (50ma to 300ma) v in4 (v) 2.7 0 output current i vout4 (ma) 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 3 3.3 3.6 3.9 358623 g37 4.2 4.5 t = 90c t = ?45c l = 2.2h v out4 = 4.9v (set for 5v) t = 25c v in4 (v) 2.7 80 maximum duty cycle (%) 90 85 95 100 3 3.3 3.6 3.9 4.2 4.5 358623 g38 t = 90c t = 25c t = ? 45c (t a = 25c unless otherwise noted.) 100s/div v out3 100mv/div ac- coupled 300ma 0 i vout3 200ma/div 358623 g33 v in3 = 3.8v v out3 = 3.3v i vout4 (ma) 1 40 efficiency (%) power loss (w) 50 60 70 80 10 100 1000 358623 g23 30 20 10 0 90 100 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 v out4 = 5v efficiency power loss 50s/div v out4 100mv/div ac- coupled v in4 = 3.8v v out4 = 5v l = 2.2h c = 10f 300ma 50ma i vout4 125ma/div 358623 g39
ltc3586-2/ltc3586-3 12 358623f pin functions i lim0 , i lim1 (pins 1, 2): logic inputs. i lim0 and i lim1 control the current limit of the powerpath switching regulator. see table 1. sw4 (pin 8): switch node for the (boost) switching regulator 4. an external inductor connects between this pin and v in4 . mode (pin 9): digital input. the mode pin controls dif - ferent modes of operation for the switching regulators according to table 2. table 1. usb current limit settings (i lim1 ) (i lim0 ) usb setting 0 0 1x mode (usb 100ma limit) 0 1 10x mode (wall 1a limit) 1 0 suspend 1 1 5x mode (usb 500ma limit) ldo3v3 (pin 3): 3.3v ldo output pin. this pin provides a regulated always-on 3.3v supply voltage. ldo3v3 gets its power from v out . it may be used for light loads such as a watch dog microprocessor or real time clock. a 1f capacitor is required from ldo3v3 to ground. if the ldo3v3 output is not used it should be disabled by connecting it to v out . clprog (pin 4): usb current limit program and moni- tor pin. a resistor from clprog to ground determines the upper limit of the current drawn from the v bus pin. a fraction of the v bus current is sent to the clprog pin when the synchronous switch of the powerpath switching regulator is on. the switching regulator delivers power until the clprog pin reaches 1.188v. several v bus current limit settings are available via user input which will typically correspond to the 500ma and 100ma usb speci?cations. a multilayer ceramic averaging capacitor is required at clprog for ?ltering. ntc (pin 5): input to the thermistor monitoring circuits. the ntc pin connects to a batterys thermistor to deter- mine if the battery is too hot or too cold to charge. if the batterys temperature is out of range, charging is paused until it re-enters the valid range. a low drift bias resistor is required from v bus to ntc and a thermistor is required from ntc to ground. if the ntc function is not desired, the ntc pin should be grounded. v out4 (pins 6, 7): power output for the (boost) switching regulator 4. a 10f mlcc capacitor should be placed as close to the pins as possible. table 2. switching regulators mode regulation mode mode buck buck-boost boost 0 pulse skipping pwm pulse skipping 1 burst burst pulse skipping fb4 (pin 10): feedback input for the (boost) switching regulator 4. when the control loop is complete, the volt - age on this pin servos to 0.8v. fb3 (pin 11): feedback input for (buck-boost) switching regulator 3. when regulator 3s control loop is complete, this pin servos to 0.8v. v c3 (pin 12): output of the error ampli ? er and voltage com - pensation node for (buck-boost) switching regulator 3. external type i or type iii compensation (to fb3) connects to this pin. see the applications information section for selecting buck-boost compensation components. swab3 (pin 13): switch node for (buck-boost) switch - ing regulator 3. connected to internal power switches a and b. an external inductor connects between this node and swcd3. v in3 (pins 14, 15): power input for (buck-boost) switching regulator 3. these pins will generally be connected to v out . a 1f mlcc capacitor is recommended on these pins. v out3 (pins 16, 17): output voltage for (buck-boost) switching regulator 3. en3 (pin 18): digital input. this input enables the buck-boost switching regulator 3. swcd3 (pin 19): switch node for (buck-boost) switch - ing regulator 3 connected to internal power switches c and d. an external inductor connects between this node and swab3.
ltc3586-2/ltc3586-3 13 358623f pin functions en2 (pin 20): digital input. this input enables the buck switching regulator 2. en1 (pin 21): digital input. this input enables the buck switching regulator 1. v in4 (pin 22): power input for switching regulator 4 (boost). this pin will generally be connected to v out . a 1f mlcc capacitor is recommended on this pin. fb2 (pin 23): feedback input for (buck) switching regu - lator 2. when regulator 2s control loop is complete, this pin servos to 0.8v. v in2 (pin 24): power input for (buck) switching regu - lator 2. this pin will generally be connected to v out . a 1f mlcc capacitor is recommended on this pin. sw2 (pin 25): power transmission pin for (buck) switch- ing regulator 2. sw1 (pin 26): power transmission pin for (buck) switch- ing regulator 1. v in1 (pin 27): power input for (buck) switching regula - tor 1. this pin will generally be connected to v out . a 1f mlcc capacitor is recommended on this pin. fb1 (pin 28): feedback input for (buck) switching regu - lator 1. when regulator 1s control loop is complete, this pin servos to 0.8v. prog (pin 29): charge current program and charge current monitor pin. connecting a resistor from prog to ground programs the charge current. if suf?cient in- put power is available in constant-current mode, this pin servos to 1v. the voltage on this pin always represents the actual charge current. chrg (pin 30): open-drain charge status output. the chrg pin indicates the status of the battery charger. four possible states are represented by chrg: charging, not charging, unresponsive battery and battery temperature out of range. chrg is modulated at 35khz and switches between a low and a high duty cycle for easy recogni - tion by either humans or microprocessors. see table 3. chrg requires a pull-up resistor and/or led to provide indication. gate (pin 31): analog output. this pin controls the gate of an optional external p-channel mosfet transistor used to supplement the ideal diode between v out and bat. the external ideal diode operates in parallel with the internal ideal diode. the source of the p-channel mosfet should be connected to v out and the drain should be connected to bat. if the external ideal diode fet is not used, gate should be left f oating. bat (pin 32): single cell li-ion battery pin. depending on available v bus power, a li-ion battery on bat will either deliver power to v out through the ideal diode or be charged from v out via the battery charger. en4 (pin 33): digital input. this input enables the boost switching regulator 4. v out (pin 34): output voltage of the switching powerpath controller and input voltage of the battery charger. the majority of the portable product should be powered from v out . the ltc3586-2/ltc3586-3 will partition the available power between the external load on v out and the internal battery charger. priority is given to the external load and any extra power is used to charge the battery. an ideal diode from bat to v out ensures that v out is powered even if the load exceeds the allotted power from v bus or if the v bus power source is removed. v out should be bypassed with a low impedance ceramic capacitor. v bus (pins 35, 36): primary input power pin. these pins deliver power to v out via the sw pin by drawing controlled current from a dc source such as a usb port or wall adapter. sw (pin 37): power transmission pin for the usb power path. the sw pin delivers power from v bus to v out via the buck switching regulator. a 3.3h inductor should be connected from sw to v out . fault (pin 38): open-drain status output. used to in - dicate fault condition in any of the four general purpose voltage regulators. gnd (exposed pad pin 39): ground. the exposed pad should be connected to a continuous ground plane on the second layer of the printed circuit board by several vias directly under the ltc3586-2/ltc3586-3.
ltc3586-2/ltc3586-3 14 358623f 39 + + ? + ? v in3 swab3 v out3 gnd 358623 bd 30 chrg 4 clprog 5 ntc 22 v in4 21 en1 20 en2 18 en3 33 en4 9 mode 1 i lim0 2 i lim1 10 fb4 1a 2.25mhz (buck-boost) switching regulator 3 13 swcd3 19 24 23 v in2 sw2 fb2 400ma 2.25mhz (buck) switching regulator 2 25 27 28 v in1 29 prog 32 bat 15mv 0.3v 3.6v en1 en2 en3 en4 a b d c ideal 1.188v sw1 fb1 12 v c3 400ma 2.25mhz (buck) switching regulator 1 2.25mhz powerpath switching regulator 800ma 2.25mhz (boost) switching regulator 4 26 master logic cc/cv charger 3.3v ldo charge status 38 fault fault logic 31 gate 34 v out sw + ? + ? + ? v out4 8 sw4 battery temperature monitor suspend ldo 500a 37 ldo3v3 3 v bus 11 fb3 35, 36 6, 7 14, 15 16, 17 block diagram
ltc3586-2/ltc3586-3 15 358623f operation introduction the ltc3586-2/ltc3586-3 are highly integrated power management ics which include a high ef ? ciency switch mode powerpath controller, a battery charger, an ideal diode, an always-on ldo, two 400ma buck switching regulators, a 1a buck-boost switching regulator, and an 800ma boost switching regulator. all of the regulators can be independently controlled via enable pins. designed speci ? cally for usb applications, the powerpath controller incorporates a precision average input current buck switching regulator to make maximum use of the allowable usb power. because power is conserved, the ltc3586-2/ltc3586-3 allow the load current on v out to exceed the current drawn by the usb port without exceed - ing the usb load speci ? cations. the powerpath switching regulator and battery charger communicate to ensure that the input current never violates the usb speci?cations. the ideal diode from bat to v out guarantees that ample power is always available to v out even if there is insuf?cient or absent power at v bus . an always-on ldo provides a regulated 3.3v from avail - able power at v out . drawing very little quiescent current, this ldo will be on at all times and can be used to supply up to 20ma. along with constant frequency pwm mode, the buck and the buck-boost switching regulators have a low power burst mode setting for signi?cantly reduced quiescent current under light load conditions. high ef f ciency switching powerpath controller whenever v bus is available and the powerpath switch- ing regulator is enabled, power is delivered from v bus to v out via sw. v out drives the combination of the external load (including switching regulators 1, 2, 3 and 4) and the battery charger. if the combined load does not exceed the powerpath switching regulators programmed input current limit, v out will track 0.3v above the battery (bat-track). by keeping the voltage across the battery charger low, ef?ciency is optimized because power lost to the linear battery char - ger is minimized. power available to the external load is therefore optimized. if the combined load at v out is large enough to cause the switching powerpath supply to reach the programmed input current limit, the battery charger will reduce its charge current by that amount necessary to enable the external load to be satis?ed. even if the battery charge current is set to exceed the allowable usb current, the usb speci?cation will not be violated. the powerpath switch- ing regulator will limit the average input current so that the usb speci?cation is never violated. furthermore, load current at v out will always be prioritized and only excess available power will be used to charge the battery. if the voltage at bat is below 3.3v, or the battery is not present, and the load requirement does not cause the powerpath switching regulator to exceed the usb speci?cation, v out will regulate at 3.6v, as shown in figure 1. this instant-on feature will allow a portable product to run immediately when power is applied without waiting for the battery to charge. if the load exceeds the current limit at v bus, v out will range between the no-load voltage and slightly below the battery voltage, indicated by the shaded region of figure 1. for very low-battery voltages, the battery charger acts like a load and, due to limited input power, its current will tend to pull v out below the 3.6v instant-on voltage. to prevent v out from falling below this level, an undervoltage circuit automatically detects that v out is falling and reduces the battery charge as needed. this reduction ensures that load current and output voltages are always priortized while allowing as much battery charge current as possible. see over-programming the battery charger in applications information section. the power delivered from v bus to v out is controlled by a 2.25mhz constant-frequency buck switching regulator. to meet the usb maximum load speci?cation, the switching regulator includes a control loop which ensures that the average input current is below the level programmed at clprog.
ltc3586-2/ltc3586-3 16 358623f the current at clprog is a fraction (h clprog C1 ) of the v bus current. when a programming resistor and an av - eraging capacitor are connected from clprog to gnd, the voltage on clprog represents the average input current of the powerpath switching regulator. when the input current approaches the programmed limit, clprog reaches v clprog , 1.188v and power out is held constant. the input current limit is programmed by the i lim0 and i lim1 pins to limit average input current to one of several possible settings as well as be deactivated (usb suspend). the input current limit will be set by the v clprog servo voltage and the resistor on clprog according to the fol- lowing expression: i vbus = i vbusq + v clprog r clprog ? h clprog + 1 ( ) figure 1 shows the range of possible voltages at v out as a function of battery voltage. ideal diode from bat to v out the ltc3586-2/ltc3586-3 have an internal ideal diode as well as a controller for an optional external ideal diode. the ideal diode controller is always on and will respond quickly whenever v out drops below bat. figure 1. v out vs bat if the load current increases beyond the power allowed from the switching regulator, additional power will be pulled from the battery via the ideal diode. furthermore, if power to v bus (usb or wall power) is removed, then all of the application power will be provided by the bat - tery via the ideal diode. the transition from input power to battery power at v out will be quick enough to allow only the10f capacitor to keep v out from drooping. the ideal diode consists of a precision ampli?er that enables a large on-chip p-channel mosfet transistor whenever the voltage at v out is approximately 15mv (v fwd ) below the voltage at bat. the resistance of the internal ideal diode is approximately 180m. if this is suf?cient for the application, then no external components are necessary. however, if more conductance is needed, an external p-channel mosfet transistor can be added from bat to v out . see figure 2. when an external p-channel mosfet transistor is pres - ent, the gate pin of the ltc3586-2/ltc3586-3 drive its gate for automatic ideal diode control. the source of the external p - channel mosfet should be connected to v out and the drain should be connected to bat. capable of driving a 1nf load, the gate pin can control an external p-channel mosfet transistor having an on-resistance of 40m or lower. figure 2. ideal diode operation operation bat (v) 2.4 4.5 4.2 3.9 3.6 3.3 3.0 2.7 2.4 3.3 3.9 358623 f01 2.7 3.0 3.6 4.2 v out (v) no load 300mv forward voltage (mv) (bat ? v out ) 0 current (ma) 600 1800 2000 2200 120 240 300 358623 f02 200 1400 1000 400 1600 0 1200 800 60 180 360 480420 vishay si2333 optional external ideal diode ltc3586-2/ ltc3586-3 ideal diode on semiconductor mbrm120lt3
ltc3586-2/ltc3586-3 17 358623f operation suspend ldo if the ltc3586-2/ltc3586-3 are con?gured for usb sus - pend mode, the switching regulator is disabled and the suspend ldo provides power to the v out pin (presuming there is power available to v bus ). this ldo will prevent the battery from running down when the portable product has access to a suspended usb port. regulating at 4.6v, this ldo only becomes active when the switching converter is disabled (suspended). to remain compliant with the usb speci?cation, the input to the ldo is current limited so that it will not exceed the 500a low power suspend speci?cation. if the load on v out exceeds the suspend current limit, the additional current will come from the battery via the ideal diode. 3.3v always-on supply the ltc3586-2/ltc3586-3 include a low quiescent current low dropout regulator that is always powered. this ldo can be used to provide power to a system pushbutton controller, standby microcontroller or real-time clock. de - signed to deliver up to 20ma, the always-on ldo requires at least a 1f low impedance ceramic bypass capacitor for compensation. the ldo is powered from v out , and therefore will enter dropout at loads less than 20ma as v out falls near 3.3v. if the ldo3v3 output is not used, it should be disabled by connecting it to v out . v bus undervoltage lockout (uvlo) an internal undervoltage lockout circuit monitors v bus and keeps the powerpath switching regulator off until v bus rises above 4.30v and is about 200mv above the battery voltage. hysteresis on the uvlo turns off the regulator if v bus drops below 4.00v or to within 50mv of bat. when this happens, system power at v out will be drawn from the battery via the ideal diode. battery charger the ltc3586-2/ltc3586-3 include a constant-current/ constant-voltage battery charger with automatic recharge, automatic termination by safety timer, low voltage trickle charging, bad cell detection and thermistor sensor input for out-of-temperature charge pausing. battery preconditioning when a battery charge cycle begins, the battery charger ?rst determines if the battery is deeply discharged. if the battery voltage is below v trkl , typically 2.85v, an automatic trickle charge feature sets the battery charge current to 10% of the programmed value. if the low voltage persists for more than 1/2 hour, the battery charger automatically terminates and indicates via the chrg pin that the battery was unresponsive. + ? + + ? 0.3v 1.188v 3.6v clprog i switch / h clprog + ? + ? 15mv ideal diode pwm and gate drive average input current limit controller average output voltage limit controller constant-current constant-voltage battery charger + ? 4 gate 31 v out 34 sw 3.5v to (bat + 0.3v) to system load optional external ideal diode pmos single cell li-ion 358623 f03 37 bat 32 v bus to usb or wall adapter 35, 36 + figure 3. powerpath block diagram
ltc3586-2/ltc3586-3 18 358623f operation once the battery voltage is above 2.85v, the battery charger begins charging in full power constant-current mode. the current delivered to the battery will try to reach 1022v/ r prog . depending on available input power and external load conditions, the battery charger may or may not be able to charge at the full programmed rate. the external load will always be prioritized over the battery charge current. the usb current limit programming will always be observed and only additional power will be available to charge the battery. when system loads are light, battery charge current will be maximized. charge termination the battery charger has a built-in safety timer. when the voltage on the battery reaches the pre-programmed f oat voltage, the battery charger will regulate the battery volt - age and the charge current will decrease naturally. once the battery charger detects that the battery has reached the foat voltage, the four hour safety timer is started. after the safety timer expires, charging of the battery will discontinue and no more current will be delivered. automatic recharge after the battery charger terminates, it will remain off drawing only microamperes of current from the battery. if the portable product remains in this state long enough, the battery will eventually self discharge. to ensure that the battery is always topped off, a charge cycle will auto - matically begin when the battery voltage falls below the recharge threshold which is typically 100mv less than the chargers foat voltage. in the event that the safety timer is running when the battery voltage falls below the recharge threshold, it will reset back to zero. to prevent brief excursions below the recharge threshold from reset - ting the safety timer, the battery voltage must be below the recharge threshold for more than 1.3ms. the charge cycle and safety timer will also restart if the v bus uvlo cycles low and then high (e.g., v bus is removed and then replaced). charge current the charge current is programmed using a single resis - tor from prog to ground. 1/1022th of the battery charge current is sent to prog which will attempt to servo to 1.000v. thus, the battery charge current will try to reach 1022 times the current in the prog pin. the program resistor and the charge current are calculated using the following equations: r prog = 1022v i chg , i chg = 1022v r prog in either the constant-current or constant-voltage charging modes, the voltage at the prog pin will be proportional to the actual charge current delivered to the battery. there - fore, the actual charge current can be determined at any time by monitoring the prog pin voltage and using the following equation: i bat = v prog r prog ? 1022 in many cases, the actual battery charge current, i bat , will be lower than i chg due to limited input power available and prioritization with the system load drawn from v out . charge status indication the chrg pin indicates the status of the battery charger. four possible states are represented by chrg which in - clude charging, not charging, unresponsive battery, and battery temperature out of range. the signal at the chrg pin can be easily recognized as one of the above four states by either a human or a mi - croprocessor. an open-drain output, the chrg pin can drive an indicator led through a current limiting resistor for human interfacing or simply a pull-up resistor for microprocessor interfacing.
ltc3586-2/ltc3586-3 19 358623f to make the chrg pin easily recognized by both humans and microprocessors, the pin is either low for charging, high for not charging, or it is switched at high frequency (35khz) to indicate the two possible faults, unresponsive battery and battery temperature out of range. when charging begins, chrg is pulled low and remains low for the duration of a normal charge cycle. when charging is complete, i.e., the bat pin reaches the foat voltage and the charge current has dropped to one tenth of the programmed value, the chrg pin is released (hi - z). if a fault occurs, the pin is switched at 35khz. while switching, its duty cycle is modulated between a high and low value at a very low frequency. the low and high duty cycles are disparate enough to make an led appear to be on or off thus giving the appearance of blinking. each of the two faults has its own unique blink rate for human recognition as well as two unique duty cycles for machine recognition. the chrg pin does not respond to the c/10 threshold if the ltc3586-2/ltc3586-3 are in v bus current limit. this prevents false end-of-charge indications due to insuf?cient power available to the battery charger. table 3 illustrates the four possible states of the chrg pin when the battery charger is active. table 3. chrg signal status frequency modulation (blink) frequency duty cycles charging 0hz 0hz (lo-z) 100% not charging 0hz 0hz (hi-z) 0% ntc fault 35khz 1.5hz at 50% 6.25% to 93.75% bad battery 35khz 6.1hz at 50% 12.5% to 87.5% an ntc fault is represented by a 35khz pulse train whose duty cycle varies between 6.25% and 93.75% at a 1.5hz rate. a human will easily recognize the 1.5hz rate as a slow blinking which indicates the out-of-range battery temperature while a microprocessor will be able to decode either the 6.25% or 93.75% duty cycles as an ntc fault. if a battery is found to be unresponsive to charging (i.e., its voltage remains below 2.85v for 1/2 hour), the chrg pin gives the battery fault indication. for this fault, a human would easily recognize the frantic 6.1hz fast blink of the led while a microprocessor would be able to decode either the 12.5% or 87.5% duty cycles as a bad battery fault. note that the ltc3586-2/ltc3586-3 are 3-terminal powerpath products where system load is always pri - oritized over battery charging. due to excessive system load, there may not be suf?cient power to charge the battery beyond the trickle charge threshold voltage within the bad battery timeout period. in this case, the battery charger will falsely indicate a bad battery. system software may then reduce the load and reset the battery charger to try again. although very improbable, it is possible that a duty cycle reading could be taken at the bright-dim transition (low duty cycle to high duty cycle). when this happens the duty cycle reading will be precisely 50%. if the duty cycle reading is 50%, system software should disqualify it and take a new duty cycle reading. ntc thermistor the battery temperature is measured by placing a nega - tive temperature coef?cient (ntc) thermistor close to the battery pack. to use this feature, connect the ntc thermistor, r ntc , between the ntc pin and ground and a resistor, r nom , from v bus to the ntc pin. r nom should be a 1% resis - tor with a value equal to the value of the chosen ntc thermistor at 25c (r25). a 100k thermistor is recom - mended since thermistor current is not measured by the ltc3586-2/ltc3586-3 and will have to be budgeted for usb compliance. the ltc3586-2/ltc3586-3 will pause charging when the resistance of the ntc thermistor drops to 0.54 times the value of r25 or approximately 54k. for vishay curve 1 thermistor, this corresponds to approximately 40c. if the battery charger is in constant voltage ( f oat) mode, the safety timer also pauses until the thermistor indicates a return to a valid temperature. as the temperature drops, the resistance of the ntc thermistor rises. the ltc3586 - 2/ ltc3586-3 are also designed to pause charging when the value of the ntc thermistor increases to 3.25 times the value of r25. for vishay curve 1 this resistance, 325k, corresponds to approximately 0c. the hot and cold comparators each have approximately 3c of hysteresis to prevent oscillation about the trip point. grounding the ntc pin disables the ntc charge pausing function. operation
ltc3586-2/ltc3586-3 20 358623f thermal regulation to optimize charging time, an internal thermal feedback loop may automatically decrease the programmed charge current. this will occur if the die temperature rises to approximately 110c. thermal regulation protects the ltc3586-2/ltc3586-3 from excessive temperature due to high power operation or high ambient thermal conditions and allows the user to push the limits of the power han - dling capability with a given circuit board design without risk of damaging the ltc3586-2/ltc3586-3 or external components. the bene?t of the ltc3586-2/ltc3586-3 thermal regulation loop is that charge current can be set according to actual conditions rather than worst-case conditions with the assurance that the battery charger will automatically reduce the current in worst-case conditions. a fow chart of battery charger operation can be seen in figure 4. low supply operation the ltc3586-2/ltc3586-3 incorporate an undervoltage lockout circuit on v out which shuts down all four general purpose switching regulators when v out drops below v outuvlo . this uvlo prevents unstable operation. fault pin fault is an open-drain output used to indicate a fault condition on any of the general purpose regulators. if the fb pin voltage of any of the enabled regulators stays below 92% of the internal reference voltage (0.8v) for more than 14ms, a fault condition will be reported by fault going low. since fault is an open-drain output, it requires a pull-up resistor to the input voltage of the monitoring microprocessor or another appropriate power source such as ld03v3. general purpose buck switching regulators the ltc3586-2/ltc3586-3 contain two 2.25mhz constant- frequency current mode buck switching regulators. each buck regulator can provide up to 400ma of output current. both buck regulators can be programmed for a minimum output voltage of 0.8v and can be used to power a micro - controller core, microcontroller i/o, memory, disk drive or other logic circuitry. both buck converters support 100% duty cycle operation (low dropout mode) when their input voltage drops very close to their output voltage. to suit a variety of applications, selectable mode functions can be used to trade-off noise for ef?ciency. two modes are avail - able to control the operation of the ltc3586-2/ltc3586-3s buck regulators. at moderate to heavy loads, the pulse- skipping mode provides the least noise switching solution. at lighter loads, burst mode operation may be selected. the buck regulators include soft-start to limit inrush cur - rent when powering on, short-circuit current protection and switch node slew limiting circuitry to reduce radiated emi. no external compensation components are required. the operating mode of the buck regulators can be set by the mode pin. the buck converters can be individually enabled by the en1 and en2 pins. both buck regulators have a ? xed feedback servo voltage of 800mv. the buck regulator input supplies v in1 and v in2 will generally be connected to the system load pin v out . buck regulator output voltage programming both buck regulators can be programmed for output volt - ages greater than 0.8v. the output voltage for each buck regulator is programmed using a resistor divider from the buck regulator output connected to the feedback pins (fb1 and fb2) such that: v outx = v fbx r1 r2 + 1 ? ? ? ? ? ? where v fb is ?xed at 0.8v and x = 1, 2. see figure 5. typical values for r1 are in the range of 40k to 1m. the capacitor c fb cancels the pole created by feedback resistors and the input capacitance of the fbx pin and also helps to improve transient response for output voltages much greater than 0.8v. a variety of capacitor sizes can be used for c fb but a value of 10pf is recommended for most ap - plications. experimentation with capacitor sizes between 2pf and 22pf may yield improved transient response. operation
ltc3586-2/ltc3586-3 21 358623f operation clear event timer ntc out of range chrg currently high-z indicate ntc fault at chrg battery state charge at 1022v/r prog rate pause event timer inhibit charger charge with fixed voltage (4.200v) run event timer charge at 100v/r prog (c/10 rate) run event timer assert chrg low power on timer > 30 minutes timer > 4 hours bat > 2.85v bat < 4.1v i bat < c/10 no no yes yes yes yes yes yes no no bat > 4.15v bat < 2.85v 2.85v < bat < 4.15v no no no no inhibit charging stop charging indicate battery fault at chrg bat rising through 4.1v bat falling through 4.1v release chrg high-z release chrg high-z 358623 f04 no yes yes yes figure 4. flow chart for battery charger operation (ltc3586-2)
ltc3586-2/ltc3586-3 22 358623f buck regulator operating modes the ltc3586-2/ltc3586-3s buck regulators include two possible operating modes to meet the noise/ power needs of a variety of applications. in pulse-skipping mode, an internal latch is set at the start of every cycle which turns on the main p-channel mosfet switch. during each cycle, a current compara - tor compares the peak inductor current to the output of an error ampli?er. the output of the current comparator resets the internal latch which causes the main p-channel mosfet switch to turn off and the n-channel mosfet synchronous recti?er to turn on. the n-channel mosfet synchronous recti?er turns off at the end of the 2.25mhz cycle or if the current through the n-channel mosfet synchronous recti?er drops to zero. using this method of operation, the error ampli?er adjusts the peak inductor current to deliver the required output power. all neces - sary compensation is internal to the switching regulator requiring only a single ceramic output capacitor for sta - bility. at light loads, the inductor current may reach zero on each pulse which will turn off the n-channel mosfet synchronous recti?er. in this case, the switch node (sw1, sw2) goes high impedance and the switch node voltage will ring. this is discontinuous mode operation, and is normal behavior for a switching regulator. at very light loads, the buck regulators will automatically skip pulses as needed to maintain output regulation. at high duty cycles (v outx > v inx /2) it is possible for the inductor current to reverse, causing the buck regulator to operate continuously at light loads. this is normal and regulation is maintained, but the supply current will increase to several milliamperes due to continuous switching. operation in burst mode operation, the buck regulator automati - cally switches between ? xed frequency pwm operation and hysteretic control as a function of the load current. at light loads, the buck regulators operate in hysteretic mode in which the output capacitor is charged to a volt - age slightly higher than the regulation point. the buck converter then goes into sleep mode, during which the output capacitor provides the load current. in sleep mode, most of the regulators circuitry is powered down, helping conserve battery power. when the output voltage drops below a predetermined value, the buck regulator circuitry is powered on and the normal pwm operation resumes. the duration for which the buck regulator operates in sleep mode depends on the load current. the sleep time decreases as the load current increases. beyond a certain load current point (about 1/4 rated output load current) the step-down switching regulators will switch to a low noise constant frequency pwm mode of operation, much the same as pulse-skipping operation at high loads. for applications that can tolerate some output ripple at low output currents, burst mode operation provides better ef ? ciency than pulse skip at light loads while still provid - ing the full speci ? ed output current of the buck regulator. the buck regulators allow mode transition on the f y, providing seamless transition between modes even under load. this allows the user to switch back and forth between modes to reduce output ripple or increase low current ef?ciency as needed. buck regulator in shutdown the buck regulators are in shutdown when not enabled for operation. in shutdown, all circuitry in the buck regulator is disconnected from the buck regulator input supply leaving only a few nanoamps of leakage current. the buck regulator outputs are individually pulled to ground through a 10k resistor on the switch pins (sw1 and sw2) when in shutdown. buck regulator dropout operation it is possible for a buck regulators input voltage, v inx , to approach its programmed output voltage (e.g., a battery voltage of 3.4v with a programmed output voltage of 3.3v). v inx ltc3586-2/ ltc3586-3 l swx r1 c out x = 1, 2 c fb v outx r2 358623 f05 fbx gnd figure 5. buck converter application circuit
ltc3586-2/ltc3586-3 23 358623f when this happens, the pmos switch duty cycle increases until it is turned on continuously at 100%. in this dropout condition, the respective output voltage equals the buck regulators input voltage minus the voltage drops across the internal p-channel mosfet and the inductor. buck regulator soft-start operation soft-start is accomplished by gradually increasing the peak inductor current for each buck regulator over a 500s period. this allows each output to rise slowly, helping minimize the battery in-rush current. a soft-start cycle occurs whenever a given buck regulator is enabled, or after a fault condition has occurred (thermal shutdown or uvlo). a soft-start cycle is not triggered by changing operating modes. this allows seamless output operation when transitioning between modes. buck regulator switching slew rate control the buck regulators contain new patent pending circuitry to limit the slew rate of the switch node (sw1 and sw2). this new circuitry is designed to transition the switch node over a period of a couple of nanoseconds, signi?cantly reducing radiated emi and conducted supply noise. buck-boost dc/dc switching regulator the ltc3586-2/ltc3586-3 contain a 2.25mhz constant- frequency voltage-mode buck-boost switching regulator. the regulator provides up to 1a of output load current. the buck-boost can be programmed to a minimum output voltage of 2.5v and can be used to power a microcon - troller core, microcontroller i/o, memory, disk drive, or other logic circuitry. the converter is enabled by pulling en3 high. to suit a variety of applications, a selectable mode function allows the user to trade-off noise for ef - ? ciency. two modes are available to control the operation of the ltc3586-2/ltc3586-3s buck-boost regulator. at moderate to heavy loads, the constant frequency pwm mode provides the least noise switching solution. at lighter loads burst mode operation may be selected. the output voltage is programmed by a user-supplied resistive divider returned to fb3. an error ampli ? er compares the divided output voltage with a reference and adjusts the compensation voltage accordingly until the fb3 pin has stabilized to the reference voltage (0.8v). the buck-boost regulator includes a soft-start to limit inrush current and voltage overshoot when powering on, short-circuit cur - rent protection, and switch node slew limiting circuitry for reduced radiated emi. input current limit the input current limit comparator will shut the input pmos switch off once current exceeds 2.5a (typical). the 2.5a input current limit also protects against a grounded v out3 node. output overvoltage protection if the fb3 node were inadvertently shorted to ground, then the output would increase inde ? nitely with the maximum current that could be sourced from v in3 . the ltc3586-2/ ltc3586-3 protect against this by shutting off the input pmos if the output voltage exceeds 5.6v (typical). low output voltage operation when the output voltage is below 2.65v (typical) during start-up, burst mode operation is disabled and switch d is turned off (allowing forward current through the well diode and limiting reverse current to 0ma). buck-boost regulator pwm operating mode in pwm mode the voltage seen at fb3 is compared to the reference voltage (0.8v). from the fb3 voltage an error ampli ? er generates an error signal seen at v c3 . this error signal commands pwm waveforms that modulate switches a, b, c, and d. switches a and b operate synchronously as do switches c and d. if v in3 is signi ? cantly greater than the programmed v out3 , then the converter will op - erate in buck mode. in this case switches a and b will be modulated, with switch d always on (and switch c always off), to step-down the input voltage to the programmed output. if v in3 is signi ? cantly less than the programmed v out3 , then the converter will operate in boost mode. in this case switches c and d are modulated, with switch a operation
ltc3586-2/ltc3586-3 24 358623f always on (and switch b always off), to step-up the input voltage to the programmed output. if v in3 is close to the programmed v out3 , then the converter will operate in 4 - switch mode. in this case the switches sequence through the pattern of ad, ac, bd to either step the input voltage up or down to the programmed output. buck-boost regulator burst-mode operation in burst mode operation, the buck-boost regulator uses a hysteretic fb3 voltage algorithm to control the output voltage. by limiting fet switching and using a hysteretic control loop, switching losses are greatly reduced. in this mode output current is limited to 50ma typical. while operating in burst mode operation, the output capacitor is charged to a voltage slightly higher than the regulation point. the buck-boost converter then goes into a sleep state, during which the output capacitor provides the load current. the output capacitor is charged by charging the inductor until the input current reaches 250ma typical and then discharging the inductor until the reverse current reaches 0ma typical. this process is repeated until the feedback voltage has charged to 6mv above the regulation point. in the sleep state, most of the regulators circuitry is powered down, helping to conserve battery power. when the feedback voltage drops 6mv below the regula - tion point, the switching regulator circuitry is powered on and another burst cycle begins. the duration for which the regulator sleeps depends on the load current and output capacitor value. the sleep time decreases as the load current increases. the buck-boost regulator will not go to sleep if the current is greater than 50ma, and if the load current increases beyond this point while in burst mode operation the output will lose regulation. burst mode operation provides a signi ? cant improvement in ef ? ciency at light loads at the expense of higher output ripple when compared to pwm mode. for many noise-sensitive systems, burst mode operation might be undesirable at certain times (i.e., during a transmit or receive cycle of a wireless device), but highly desirable at others (i.e., when the device is in low power standby mode). the mode pin is used to enable or disable burst mode operation at any time, offering both low noise and low power operation when they are needed. buck-boost regulator soft-start operation soft-start is accomplished by gradually increasing the maximum v c3 voltage over a 0.5ms (typical) period. ramping the v c3 voltage limits the duty cycle and thus the v out3 voltage minimizing output overshoot during startup. a soft-start cycle occurs whenever the buck-boost is enabled, or after a fault condition has occurred (thermal shutdown or uvlo). a soft-start cycle is not triggered by changing operating modes. this allows seamless output operation when transitioning between burst mode opera - tion and pwm mode. synchronous boost dc/dc switching regulator the ltc3586-2/ltc3586-3 contain a 2.25mhz constant- frequency current mode synchronous boost switching regulator with true output disconnect feature. the regulator provides at least 800ma of output load current and the output voltage can be programmed up to a maximum of 5v. the converter is enabled by pulling en4 high. the boost regulator also includes soft-start to limit inrush current and voltage overshoot when powering on, short circuit current protection and switch node slew limiting circuitry for reduced radiated emi. error amp the boost output voltage is programmed by a user-sup - plied resistive divider returned to the fb4 pin. an internally compensated error ampli ? er compares the divided output voltage with an internal 0.8v reference and adjusts the voltage accordingly until fb4 servos to 0.8v. current limit lossless current sensing converts the nmos switch cur - rent signal to a voltage to be summed with the internal slope compensation signal. the summed signal is then compared to the error ampli ? er output to provide a peak current control command for the peak comparator. peak switch current is limited to 2.8a independent of output voltage. operation
ltc3586-2/ltc3586-3 25 358623f zero current comparator the zero current comparator monitors the inductor current to the output and shuts off the synchronous recti ? er once the current drops to approximately 65ma. this prevents the inductor current from reversing in polarity thereby improving ef ? ciency at light loads. antiringing control the antiringing control circuitry prevents high frequency ringing of the sw pin as the inductor current goes to zero in discontinuous mode. the damping of the resonant circuit formed by l and c sw (capacitance of the sw4 pin) is achieved internally by switching a 150 resistor across the inductor. pmos synchronous rectifer to prevent the inductor current from running away, the pmos synchronous recti ? er is only enabled when v out > (v in + 130mv). output disconnect and inrush limiting the ltc3586-2/ltc3586-3 boost converter is designed to allow true output disconnect by eliminating body diode conduction of the internal pmos recti ? er. this allows v out to go to zero volts during shutdown, drawing zero current from the input source. it also allows for inrush current limiting at start-up, minimizing surge currents seen by the input supply. note that to obtain the advantage of output disconnect, there must not be an external schottky diode connected between the sw4 and v out4 pin. short-circuit protection unlike most boost converters, the ltc3586-2/ltc3586 - 3 boost converter allows its output to be short-circuited due to the output disconnect feature. it incorporates internal features such as current limit foldback and thermal shutdown for protection from an excessive overload or short circuit. v in > v out operation the ltc3586-2/ltc3586-3 boost converter will maintain voltage regulation even if the input voltage is above the output voltage. this is achieved by terminating the switching of the synchronous pmos and applying v in4 statically on its gate. this ensures that the slope of the inductor current will reverse during the time when cur - rent is fowing to the output. since the pmos no longer acts as a low impedance switch in this mode, there will be more power dissipation within the ic. this will cause a sharp drop in the ef ? ciency (see typical performance characteristics, boost ef ? ciency vs v in4 ). the maximum output current should be limited in order to maintain an acceptable junction temperature. boost soft-start the ltc3586-2/ltc3586-3 boost converter provides soft- start by slowly ramping the peak inductor current from zero to a maximum of 2.8a in about 500s. ramping the peak inductor current limits transient inrush currents during start-up. a soft-start cycle occurs whenever the boost is enabled, or after a fault condition has occurred (thermal shutdown or uvlo). boost overvoltage protection if the fb4 node were inadvertently shorted to ground, then the boost converter output would increase inde ? nitely with the maximum current that could be sourced from v in4 . the ltc3586-2/ltc3586-3 protects against this by shutting off the main switch if the output voltage exceeds 5.5v. operation
ltc3586-2/ltc3586-3 26 358623f applications information powerpath controller applications section clprog resistor and capacitor as described in the high ef?ciency switching powerpath controller section, the resistor on the clprog pin deter - mines the average input current limit when the switching regulator is set to either the 1x mode (usb 100ma), the 5x mode (usb 500ma) or the 10x mode. the input cur - rent will be comprised of two components, the current that is used to drive v out and the quiescent current of the switching regulator. to ensure that the usb speci?cation is strictly met, both components of input current should be considered. the electrical characteristics table gives the worst-case values for quiescent currents in either setting as well as current limit programming accuracy. to get as close to the 500ma or 100ma speci?cations as possible, a 1% resistor should be used. recall that i vbus = i vbusq + v clprog /r clpprog ? (h clprog +1). an averaging capacitor is required in parallel with the clprog resistor so that the switching regulator can determine the average input current. this network also provides the dominant pole for the feedback loop when current limit is reached. to ensure stability, the capacitor on clprog should be 0.1f. choosing the powerpath inductor because the input voltage range and output voltage range of the power path switching regulator are both fairly nar - row, the ltc3586-2/ltc3586-3 are designed for a speci ? c inductance value of 3.3h. some inductors which may be suitable for this application are listed in table 4. table 4. recommended inductors for powerpath controller inductor type l (h) max i dc (a) max dcr () size in mm (l w h) manufacturer lps4018 3.3 2.2 0.08 3.9 3.9 1.7 coilcraft www.coilcraft.com d53lc db318c 3.3 3.3 2.26 1.55 0.034 0.070 5 5 3 3.8 3.8 1.8 toko www.toko.com we-tpc type m1 3.3 1.95 0.065 4.8 4.8 1.8 wurth elektronik www.we-online.com cdrh6d12 cdrh6d38 3.3 3.3 2.2 3.5 0.0625 0.020 6.7 6.7 1.5 7 7 4 sumida www.sumida.com v bus and v out bypass capacitors the style and value of capacitors used with the ltc3586 - 2/ ltc3586-3 determine several important parameters such as regulator control-loop stability and input voltage ripple. because the ltc3586-2/ltc3586-3 use a buck switching power supply from v bus to v out , its input current waveform contains high frequency components. it is strongly recommended that a low equivalent series resistance (esr) multilayer ceramic capacitor be used to bypass v bus . tantalum and aluminum capacitors are not recommended because of their high esr. the value of the capacitor on v bus directly controls the amount of input ripple for a given load current. increasing the size of this capacitor will reduce the input ripple. to prevent large v out voltage steps during transient load conditions, it is also recommended that a ceramic capaci - tor be used to bypass v out . the output capacitor is used in the compensation of the switching regulator. at least 4f of actual capacitance with low esr are required on v out . additional capacitance will improve load transient performance and stability. multilayer ceramic chip capacitors typically have excep - tional esr performance. mlccs combined with a tight board layout and an unbroken ground plane will yield very good performance and low emi emissions. there are several types of ceramic capacitors available each having considerably different characteristics. for example, x7r ceramic capacitors have the best voltage and temperature stability. x5r ceramic capacitors have appar - ently higher packing density but poorer performance over their rated voltage and temperature ranges. y5v ceramic capacitors have the highest packing density, but must be used with caution, because of their extreme non-linear characteristic of capacitance verse voltage. the actual in-circuit capacitance of a ceramic capacitor should be measured with a small ac signal as is expected in-circuit. many vendors specify the capacitance verse voltage with a 1v rms ac test signal and as a result overstate the ca - pacitance that the capacitor will present in the application. using similar operating conditions as the application, the user must measure or request from the vendor the actual capacitance to determine if the selected capacitor meets the minimum capacitance that the application requires.
ltc3586-2/ltc3586-3 27 358623f applications information over-programming the battery charger the usb high power speci?cation allows for up to 2.5w to be drawn from the usb port (5v ? 500ma). the powerpath switching regulator transforms the voltage at v bus to just above the voltage at bat with high ef?ciency, while limiting power to less than the amount programmed at clprog. in some cases the battery charger may be programmed (with the prog pin) to deliver the maximum safe charging current without regard to the usb speci?cations. if there is insuf?cient current available to charge the battery at the programmed rate, the powerpath regulator will reduce charge current until the system load on v out is satis?ed and the v bus current limit is satis?ed. programming the battery charger for more current than is available will not cause the average input current limit to be violated. it will merely allow the battery charger to make use of all available power to charge the battery as quickly as possible, and with minimal power dissipation within the battery charger. alternate ntc thermistors and biasing the ltc3586-2/ltc3586-3 provide temperature quali?ed charging if a grounded thermistor and a bias resistor are connected to ntc. by using a bias resistor whose value is equal to the room temperature resistance of the thermistor (r25) the upper and lower temperatures are pre-programmed to approximately 40c and 0c, respec - tively (assuming a vishay curve 1 thermistor). the upper and lower temperature thresholds can be ad- justed by either a modi?cation of the bias resistor value or by adding a second adjustment resistor to the circuit. if only the bias resistor is adjusted, then either the upper or the lower threshold can be modi?ed but not both. the other trip point will be determined by the characteristics of the thermistor. using the bias resistor in addition to an adjustment resistor, both the upper and the lower tempera - ture trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. examples of each technique are given below. ntc thermistors have temperature characteristics which are indicated on resistance-temperature conversion tables. the vishay-dale thermistor nths0603n011-n1003f, used in the following examples, has a nominal value of 100k and follows the vishay curve 1 resistance-temperature characteristic. in the explanation below, the following notation is used. r25 = value of the thermistor at 25c r ntc|cold = value of thermistor at the cold trip point r ntc|hot = value of the thermistor at the hot trip point r cold = ratio of r ntc|cold to r25 r hot = ratio of r ntc|cold to r25 r nom = primary thermistor bias resistor (see figure 6a) r1 = optional temperature range adjustment resistor (see figure 6b) the trip points for the ltc3586-2/ltc3586-3s temperature quali?cation are internally programmed at 0.349 ? v bus for the hot threshold and 0.765 ? v bus for the cold threshold. therefore, the hot trip point is set when: r ntc|hot r nom + r ntc|hot s v bus = 0.349 s v bus and the cold trip point is set when: r ntc|cold r nom + r ntc|cold s v bus = 0.765 s v bus solving these equations for r ntc|cold and r ntc|hot results in the following: r ntc|hot = 0.536 ? r nom and r ntc|cold = 3.25 ? r nom by setting r nom equal to r25, the above equations result in r hot = 0.536 and r cold = 3.25. referencing these ratios to the vishay resistance-temperature curve 1 chart gives a hot trip point of about 40c and a cold trip point of about 0c. the difference between the hot and cold trip points is approximately 40c.
ltc3586-2/ltc3586-3 28 358623f applications information by using a bias resistor, r nom , different in value from r25, the hot and cold trip points can be moved in either direction. the temperature span will change somewhat due to the non-linear behavior of the thermistor. the following equations can be used to easily calculate a new value for the bias resistor: r nom = r hot 0.536 ? r25 r nom = r cold 3.25 ? r25 where r hot and r cold are the resistance ratios at the de - sired hot and cold trip points. note that these equations are linked. therefore, only one of the two trip points can be chosen, the other is determined by the default ratios designed in the ic. consider an example where a 60c hot trip point is desired. from the vishay curve 1 r-t characteristics, r hot is 0.2488 at 60c. using the above equation, r nom should be set to 46.4k. with this value of r nom , the cold trip point is about 16c. notice that the span is now 44c rather than the previous 40c. this is due to the decrease in temperature gain of the thermistor as absolute tem - perature increases. the upper and lower temperature trip points can be inde- pendently programmed by using an additional bias resistor as shown in figure 6b. the following formulas can be used to compute the values of r nom and r1: r nom = r cold ? r hot 2.714 ? r25 r1 = 0.536 ? r nom ? r hot ? r25 for example, to set the trip points to 0c and 45c with a vishay curve 1 thermistor choose: r nom = 3.266 ? 0.4368 2.714 ? 100k = 104.2k the nearest 1% value is 105k: 3tlotll the nearest 1% value is 12.7k. the ?nal circuit is shown in figure 6b and results in an upper trip point of 45c and a lower trip point of 0c. ? + ? + r nom 100k r ntc 100k ntc 0.017 ? v bus ntc_enable 358623 f06a ltc3586-2/ltc3586-3 ntc block too_cold too_hot 0.765 ? v bus 0.349 ? v bus ? + 5 v bus v bus t (6a) (6b) figure 6. ntc circuits ? + ? + r nom 105k r ntc 100k r1 12.7k ntc v bus v bus 0.017 ? v bus ntc_enable 358623 f06b too_cold too_hot 0.765 ? v bus 0.349 ? v bus ? + 5 ltc3586-2/ ltc3586-3 ntc block t
ltc3586-2/ltc3586-3 29 358623f usb inrush limiting when a usb cable is plugged into a portable product, the inductance of the cable and the high-q ceramic input capacitor form an l-c resonant circuit. if the cable does not have adequate mutual coupling or if there is not much impedance in the cable, it is possible for the voltage at the input of the product to reach as high as twice the usb voltage (~10v) before it settles out. in fact, due to the high voltage coef?cient of many ceramic capacitors, a nonlinearity, the voltage may even exceed twice the usb voltage. to prevent excessive voltage from damaging the ltc3586-2/ltc3586-3 during a hot insertion, it is best to have a low voltage coef?cient capacitor at the v bus pin to the ltc3586-2/ltc3586-3. this is achievable by selecting an mlcc capacitor that has a higher voltage rating than that required for the application. for example, a 16v, x5r, 10f capacitor in a 1206 case would be a better choice than a 6.3v, x5r, 10f capacitor in a smaller 0805 case. alternatively, the soft connect circuit (figure 7) can be employed. in this circuit, capacitor c1 holds mp1 off when the cable is ?rst connected. eventually c1 begins to charge up to the usb input voltage applying increasing gate support to mp1. the long time constant of r1 and c1 prevent the current from building up in the cable too fast thus dampening out any resonant overshoot. battery charger stability considerations the ltc3586-2/ltc3586-3s battery charger contains both a constant-voltage and a constant-current control loop. the constant-voltage loop is stable without any compen - sation when a battery is connected with low impedance leads. excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1f from bat to gnd. furthermore, when the battery is disconnected, a 4.7f capacitor in series with a 0.2 to 1 resistor from bat to gnd is required to keep ripple voltage low. high value, low esr multilayer ceramic chip capacitors reduce the constant-voltage loop phase margin, possibly resulting in instability. ceramic capacitors up to 22f may be used in parallel with a battery, but larger ceramics should be decoupled with 0.2 to 1 of series resistance. in constant-current mode, the prog pin is in the feed - back loop rather than the battery voltage. because of the additional pole created by any prog pin capacitance, capacitance on this pin must be kept to a minimum. with no additional capacitance on the prog pin, the battery charger is stable with program resistor values as high as 25k. however, additional capacitance on this node reduces the maximum allowed program resistor. the pole frequency at the prog pin should be kept above 100khz. therefore, if the prog pin has a parasitic capacitance, c prog , the following equation should be used to calculate the maximum resistance value for r prog : r prog 1 2 ? 100khz ? c prog buck regulator applications section buck regulator inductor selection many different sizes and shapes of inductors are avail - able from numerous manufacturers. choosing the right inductor from such a large selection of devices can be overwhelming, but following a few basic guidelines will make the selection process much simpler. the buck converters are designed to work with inductors in the range of 2.2h to 10h. for most applications a 4.7h inductor is suggested for both buck regulators. larger value inductors reduce ripple current which im - proves output ripple voltage. lower value inductors result in higher ripple current and improved transient response time. to maximize ef?ciency, choose an inductor with a low dc resistance. for a 1.2v output, ef?ciency is reduced about 2% for 100m series resistance at 400ma load cur - rent, and about 2% for 300m series resistance at 100ma applications information r1 40k 5v usb input 358623 f07 c1 100nf c2 10f mp1 si2333 usb cable v bus gnd ltc3586-2/ ltc3586-3 figure 7. usb soft connect circuit
ltc3586-2/ltc3586-3 30 358623f load current. choose an inductor with a dc current rating at least 1.5 times larger than the maximum load current to ensure that the inductor does not saturate during normal operation. if output short circuit is a possible condition, the inductor should be rated to handle the maximum peak current speci?ed for the buck converters. different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and dont radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. inductors that are very thin or have a very small volume typically have much higher core and dcr losses, and will not give the best ef?ciency. the choice of which style inductor to use often depends more on the price vs size, performance and any radiated emi requirements than on what the ltc3586-2/ltc3586-3 require to operate. the inductor value also has an effect on burst mode operations. lower inductor values will cause the burst mode switching frequencies to increase. table 5 shows several inductors that work well with the ltc3586-2/ltc3586-3s buck regulators. these inductors offer a good compromise in current rating, dcr and physi - cal size. consult each manufacturer for detailed information on their entire selection of inductors. buck regulator input/output capacitor selection low esr (equivalent series resistance) mlcc capacitors should be used at both buck regulator outputs as well as at each buck regulator input supply (v in1 and v in2 ). only x5r or x7r ceramic capacitors should be used because they retain their capacitance over wider voltage and temperature ranges than other ceramic types. a 10f output capaci - tor is suf?cient for most applications. for good transient response and stability the output capacitor should retain at least 4f of capacitance over operating temperature and bias voltage. each buck regulator input supply should be bypassed with a 1f capacitor. consult with capacitor manufacturers for detailed information on their selection and speci?cations of ceramic capacitors. many manufac - turers now offer very thin (<1mm tall) ceramic capacitors ideal for use in height-restricted designs. table 6 shows a list of several ceramic capacitor manufacturers. applications information table 5. recommended inductors for buck regulators inductor type l (h) max i dc (a) max dcr () size in mm (l w h) manufacturer de2818c 4.7 1.25 0.072* 3.0 2.8 1.8 toko www.toko.com de2812c 4.7 1.15 0.13* 3.0 2.8 1.2 cdrh3d16 4.7 0.9 0.11 4 4 1.8 sumida www.sumida.com sd3118 4.7 1.3 0.162 3.1 3.1 1.8 cooper www.cooperet.com sd3112 4.7 0.8 0.246 3.1 3.1 1.2 lps3015 4.7 1.1 0.2 3.0 3.0 1.5 coilcraft www.coilcraft.com *typical dcr table 6. recommended ceramic capacitor manufacturers avx www/avxcorp.com murata www.murata.com taiyo yuden www.t-yuden.com vishay siliconix www.vishay.com tdk www.tdk.com buck-boost regulator applications section buck-boost regulator inductor selection inductor selection criteria for the buck-boost are similar to those given for the buck switching regulator. the buck- boost converter is designed to work with inductors in the range of 1h to 5h. for most applications a 2.2h inductor will suf ? ce. choose an inductor with a dc current rating at least 2 times larger than the maximum load current to ensure that the inductor does not saturate during normal operation. if output short circuit is a possible condition, the inductor should be rated to handle the maximum peak current speci ? ed for the buck-boost converter. table 7 shows several inductors that work well with the ltc3586-2/ltc3586-3s buck-boost regulator. these in - ductors offer a good compromise in current rating, dcr and physical size. consult each manufacturer for detailed information on their entire selection of inductors.
ltc3586-2/ltc3586-3 31 358623f applications information closing the feedback loop the ltc3586-2/ltc3586-3 incorporate voltage mode pwm control. the control to output gain varies with operation region (buck, boost, buck-boost), but is usually no greater than 20. the output ? lter exhibits a double pole response given by: f filter _ pole = 1 2 ? ? l ? c out hz where c out is the output ? lter capacitor. the output ? lter zero is given by: f filter _ zero = 1 2 ? ? r esr ? c out hz where r esr is the capacitor equivalent series resistance. a troublesome feature in boost mode is the right-half plane zero (rhp), and is given by: f rhpz = v in 2 2 ? ? i out ? l ? v out hz the loop gain is typically rolled off before the rhp zero frequency. a simple type i compensation network (as shown in figure 8) can be incorporated to stabilize the loop but at the cost of reduced bandwidth and slower transient response. to ensure proper phase margin, the loop must cross unity-gain decade before the lc double pole. the unity-gain frequency of the error ampli ? er with the type i compensation is given by: f ug = 1 2 ? ? r1 ? cp1 hz most applications demand an improved transient response to allow a smaller output ? lter capacitor. to achieve a higher bandwidth, type iii compensation is required. two zeros are required to compensate for the double-pole response. type iii compensation also reduces any v out3 overshoot seen during a start-up condition. table 7. recommended inductors for buck-boost regulator inductor type l (h) max i dc (a) max dcr () size in mm (l w h) manufacturer lps4018 3.3 2.2 2.2 2.5 0.08 0.07 3.9 3.9 1.7 3.9 3.9 1.7 coilcraft www.coilcraft.com d53lc 2.0 3.25 0.02 5.0 5.0 3.0 toko www.toko.com 7440430022 2.2 2.5 0.028 4.8 4.8 2.8 wrth-elektronik www.we-online.com cdrh4d22/ hp 2.2 2.4 0.044 4.7 4.7 2.4 sumida www.sumida.com sd14 2.0 2.56 0.045 5.2 5.2 1.45 cooper www.cooperet.com buck-boost regulator input/output capacitor selection low esr ceramic capacitors should be used at both the buck-boost regulator output (v out3 ) as well as the buck- boost regulator input supply (v in3 ). again, only x5r or x7r ceramic capacitors should be used because they retain their capacitance over wider voltage and temperature ranges than other ceramic types. a 22f output capacitor is suf ? cient for most applications. the buck-boost regulator input supply should be bypassed with a 2.2f capacitor. refer to table 6 for recommended ceramic capacitor manufacturers. buck-boost regulator output voltage programming the buck-boost regulator can be programmed for output voltages greater than 2.75v and less than 5.5v. the full scale output voltage is programmed using a resistor divider from the v out3 pin connected to the fb3 pin such that: v out3 = v fb3 r1 r2 + 1 ? ? ? ? ? ? where v fb3 is 0.8v. see figure 8 or 9.
ltc3586-2/ltc3586-3 32 358623f the compensation network depicted in figure 9 yields the transfer function: v c3 v out3 = r1 + r3 r1 ? r3 ? c1 ? s + 1 r2 ? c2 ? ? ? ? ? ? ? s + 1 r1 + r3 ( ) ? c3 ? ? ? ? ? ? s ? s + c1 + c2 r2 ? c1 ? c2 ? ? ? ? ? ? ? s + 1 r3 ? c3 ? ? ? ? ? ? a type iii compensation network attempts to introduce a phase bump at a higher frequency than the lc double pole. this allows the system to cross unity gain after the lc double pole, and achieve a higher bandwidth. while attempting to crossover after the lc double pole, the system must still crossover before the boost right-half plane zero. if unity gain is not reached suf ? ciently before the right-half plane zero, then the C180 of phase from the lc double pole combined with the C 90 of phase from the right-half plane zero will negate the phase bump of the compensator. the compensator zeros should be placed either before or only slightly after the lc double pole such that their positive phase contributions of the compensation network offset the C180 that occurs at the ? lter double pole. if they are placed at too low of a frequency, however, they will introduce too much gain to the system and the crossover frequency will be too high. the two high frequency poles should be placed such that the system crosses unity gain during the phase bump introduced by the zeros yet before the boost right-half plane zero and such that the compen - sator bandwidth is less than the bandwidth of the error amp (typically 900khz). if the gain of the compensation network is ever greater than the gain of the error ampli ? er, then the error ampli ? er no longer acts as an ideal op amp, another pole will be introduced where the gain crossover occurs, and the total compensation gain will not exceed that of the ampli ? er. recommended type iii compensation components for a 3.3v output: r1: 324k r fb : 105k c1: 10pf r2: 15k c2: 330pf r3: 121k c3: 33pf c out : 22f l out : 2.2h boost regulator applications section boost regulator inductor selection the boost converter is designed to work with inductors in the range of 1h to 5h. for most applications a 2.2h inductor will suf ? ce. larger value inductors will allow greater output current capability by reducing the inductor ripple current. however, using too large an inductor may push the right-half-plane zero too far inside and cause loop instability. lower value inductors result in higher ripple current and improved transient response time. refer to table 7 for recommended inductors. boost regulator input/output capacitor selection low esr (equivalent series resistance) ceramic capacitors should be used at both the boost regulator output (v out4 ) as well as the boost regulator input supply (v in4 ). only x5r or x7r ceramic capacitors should be used because they retain their capacitance over wider voltage and tem - perature ranges than other ceramic types. at least 10f of output capacitance at the rated output voltage is required to ensure stability of the boost converter output voltage over the entire temperature and load range. refer to table 6 for recommended ceramic capacitor manufacturers. applications information
ltc3586-2/ltc3586-3 33 358623f applications information ? + error amp 0.8v r1 r2 358623 f08 fb3 v c3 c p1 v out3 ? + error amp 0.8v r1 r3 c3 r fb 358623 f09 fb3 v c3 c2 c1 r2 v out3 figure 8. error amplifer with type i compensation figure 9. error amplifer with type iii compensation v in4 ltc3586-2/ ltc3586-3 l sw4 r1 c out c pl r2 358623 f10 v out4 fb4 figure 10. boost converter application circuit boost regulator output voltage programming the boost regulator can be programmed for output volt - ages up to 5v. the output voltage is programmed using a resistor divider from the v out4 pin connected to the fb4 pin such that: v out4 = v fb4 r1 r2 + 1 ? ? ? ? ? ? where v fb4 is 0.8v. see figure 10. typical values for r1 are in the range of 40k to 1m. too small a resistor will result in a large quiescent current in the feedback network and may hurt ef ? ciency at low current. too large a resistor coupled with the fb4 pin ca - pacitance will create an additional pole which may result in loop instability. if large values are chosen for r1 and r2, a phase-lead capacitor, c pl , across resistor r1 can improve the transient response. recommended values for c pl are in the range of 2pf to 10pf. printed circuit board layout considerations in order to be able to deliver maximum current under all conditions, it is critical that the exposed pad on the backside of the ltc3586-2/ltc3586-3 packages be soldered to the pc board ground. failure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in higher thermal resistances.
ltc3586-2/ltc3586-3 34 358623f applications information up and radiated emissions will occur. there should be a group of vias under the grounded backside of the pack - age leading directly down to an internal ground plane. to minimize parasitic inductance, the ground plane should be on the second layer of the pc board. the gate pin for the external ideal diode controller has extremely limited drive current. care must be taken to minimize leakage to adjacent pc board traces. 100na of leakage from this pin will introduce an offset to the 15mv ideal diode of approximately 10mv. to minimize leakage, the trace can be guarded on the pc board by surrounding it with v out connected metal, which should generally be less that one volt higher than gate. furthermore, due to its high frequency switching circuitry, it is imperative that the input capacitors, inductors and output capacitors be as close to the ltc3586-2/ltc3586-3 as possible and that there be an unbroken ground plane under the ltc3586-2/ltc3586-3 and all of its external high frequency components. high frequency currents, such as the v bus , v in1 , v in2 , v in3 , v out3 , and v out4 currents on the ltc3586-2/ltc3586-3, tend to ?nd their way along the ground plane in a myriad of paths ranging from directly back to a mirror path beneath the incident path on the top of the board. if there are slits or cuts in the ground plane due to other traces on that layer, the current will be forced to go around the slits. if high frequency currents are not allowed to f ow back through their natural least-area path, excessive voltage will build 358623 f11 figure 11. higher frequency ground currents follow their incident path. slices in the ground plane cause high voltage and increased emmisions
ltc3586-2/ltc3586-3 35 358623f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 4.00 0.10 2.40 ref 6.00 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 3837 1 2 bottom view?exposed pad 4.40 ref 0.75 0.05 r = 0.115 typ r = 0.10 typ pin 1 notch r = 0.30 or 0.35 45 chamfer 0.20 0.05 0.40 bsc 0.200 ref 0.00 ? 0.05 (ufe38) qfn 0708 rev b recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.20 0.05 0.40 bsc 2.40 ref 4.40 ref 5.10 0.05 6.50 0.05 2.65 0.05 3.10 0.05 4.50 0.05 package outline 2.65 0.10 4.65 0.10 4.65 0.05 ufe package 38-lead plastic qfn (4mm 6mm) (reference ltc dwg # 05-08-1750 rev b) package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc3586-2/ltc3586-3 36 358623f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2012 lt 0312 ? printed in usa part number description comments ltc3555 i 2 c controlled high ef ? ciency usb power manager plus triple step-down dc/dc maximizes available power from usb port, bat-track, instant on operation, 1.5a max charge current, 3.3v/25ma always-on ldo, three synchronous buck regulators, one 1a buck-boost regulator, 4mm w 5mm qfn28 package LTC3556 high ef ? ciency usb power manager plus dual buck plus buck-boost dc/dc maximizes available power from usb port, bat-track, instant on operation, 1.5a max charge current, 3.3v/25ma always-on ldo, two 400ma synchronous buck regulators, one 1a buck-boost regulator, 4mm w 5mm qfn28 package ltc3566 switching usb power manager with li-ion/polymer charger, 1a buck-boost converter plus ldo multifunction pmic: switchmode power manager and 1a buck-boost regulator + ldo, charge current programmable up to 1.5a from wall adapter input, thermal regulation synchronous buck-boost converters ef ? ciency: >95%, 4mm w 4mm qfn24 package ltc3586/ ltc3586-1 switching usb power manager with li-ion/polymer charger, 1a buck-boost + dual sync buck converter + boost + ldo complete multifunction pmic: switching power manager, 1a buck-boost + 2 bucks + boost + ldo, synchronous buck/buck-boost converter ef ? ciency: >95%; charge current 1.5a; ltc3586-1 version has 4.1v v float ; 4mm w 6mm qfn-38 package watchdog microcontroller operation typical application 14, 15 + 37 35, 36 34 32 39 30 31 mp1 c2 22f li-ion 510 to other loads 324k 121k 105k red 3.3v 1a 1.8v 400ma microprocessor 1.6v 400ma 5v 800ma l1 3.3h l2 2.2h sw v bus 5 t ntc 29 prog 4 clprog 100k 16, 17 ltc3586-2 ltc3586-3 v out3 v c3 11 19 12 3 3.3v, 20ma 38 fb3 swcd3 13 swab3 ldo3v3 i lim mode fault 18, 20, 21, 33 9 1, 2 4 en v out bat gnd chrg gate 2.2f 330pf 33pf 10pf 15k 1f 1f 22f v in3 24 10pf 1.02m c1, c2: tdk c2012x5r0j226m l1: coilcraft lps4018-332lm l2, l5: toko 1098as-2r2m l3, l4: toko 1098as-4r7m mp1: siliconix si2333 806k 10k 25 l3 4.7h sw2 23 fb2 i/o/memory core 10f v in2 27 10pf 10pf 806k 806k 26 l4 4.7h l5 2.2h sw1 28 fb1 10f 358623 ta02 88.7k 16.9k v in1 8 sw4 6, 7 v out4 10 fb4 v in4 22 system rail/ i/o audio/ motor drive 2.94k 2k 0.1f c1 22f usb/wall 4.5v to 5.5v 1f housekeeping microcontroller 2 10f 22f related parts

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